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TSMC’s AI Chips Can Become Pricier As Supply Chain Costs Rise 

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Due to the nature of its CoWoS chip packaging technology, prices for artificial intelligence (AI) chips manufactured by the Taiwan Semiconductor Manufacturing Company (TSMC) are expected to increase in the coming months, according to a news report from Taiwan. Strong interest in AI chips from large American technology firms such as NVIDIA and Microsoft has provided TSMC with much needed orders during the ongoing downturn in the semiconductor industry.

However, one key constraint in TSMC's chip fabrication process is the packaging technology that is needed for AI chips. TSMC has typically relied on CoWoS for its products that are geared toward consumer use, and since an AI chip is incomplete without packaging, the chip maker has to balance its chip fabrication and chip packaging capacities to ensure that it can deliver products to customers in a timely manner.

Upstream Supply Chain Costs Due To Increased Demand Can Make TSMC's AI Chip More Expensive

While it's creating some news these days, TSMC's CoWoS (Chip on Wafer on Substrate) packaging technology has been available to customers for quite some time now. Work on 3D packaging, with technologies such as Wafer on Wafer (WoW) and Integrated FanOut (InFO) has been going on with Apple for years, with some of the packaging technologies being part of the iPhone 7 in 2019.

CoWoS is a technology that enables TSMC to stack multiple chip dies together and improve their performance by placing them together on a silicon interposer. This interposer is, therefore, one of the most important raw materials for the entire process, and it is packaged on top of a circuit board through package balls.

A report from Taiwan's United Daily News (UDN) suggests that the increase in prices of these interposers will eventually drive up the costs of AI chips made by TSMC as the chip maker's supply chain expands its production capacity.

A simulation showing the benefits of CoWoS chip packaging. Image: S. Y. Hou et al., "Wafer-Level Integration of an Advanced Logic-Memory System Through the Second-Generation CoWoS Technology," in IEEE Transactions on Electron Devices, vol. 64, no. 10, pp. 4071-4077, Oct. 2017, doi: 10.1109/TED.2017.2737644.

Owing to the strong demand for AI products, TSMC is investing billions of dollars into upgrading its packaging capacity. The firm announced a $2.89 billion investment into a new chip packaging facility in Taiwan in July, and fresh industry reports suggest that by 2024 end, the firm is aiming to grow its packaging capacity to 30,000 wafers per month. TSMC has placed orders for new packaging machines, and the price increase for the AI chips stems from the capacity upgrade.

According to industry sources quoted by the UDN, TSMC procures the interposers for its CoWoS chips from United Microelectronics Corporation (UMC) - Taiwan's second largest contract chip manufacturer. UMC and ASE Group are expected to be the biggest beneficiaries of the bump in demand for TSMC's CoWoS products, and they have already received the first batch of orders. The two firms are currently producing and shipping these products as TSMC rushes to meet the first wave of data center and other AI orders before the current fiscal year ends.

Industry reports also suggest that due to the large influx of orders, UMC has already entered into a hot production run. By keeping in mind the growing orders, the firm also plans to double its production capacity for these products. Interposers for the CoWoS technology are produced in a UMC facility in Singapore, with the current capacity sitting at 3,000 pieces. UMC plans to expand this to at least 6,000 pieces, and TSMC is also reported to outsource some of its orders to ASE if its own production lines become strained.

Written by Ramish Zafar

WccftechContinue reading/original-link]

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