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Samsung Discloses Backside Power Delivery For Next-Gen Chips, Joining the Race With Intel

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Samsung Discloses Backside Power Delivery Method, Joining the Race With Intel 1

Samsung has adopted the backside power delivery approach for its future chips, disclosing a significant improvement over its traditional process.

Samsung's BSPDN "Backside Power Delivery" Implementation Leads to an Improved Area Utilization Rate, Ultimately Leading to Faster Performance

Samsung Electronics disclosed the metrics of the new BSPDN (Backside Power Delivery Network) method via a publication at VLSI Symposium held in Japan. For those clueless right now, a power delivery network is formulated with the aim of providing voltage to the chip die most efficiently. Formally, manufacturers have adopted delivery through the front side of the wafer, and while this method does the job, it brings a tradeoff in the form of drops in power density, ultimately leading to compromised performance.

The new BSPDN method hasn't been adopted by foundries yet, and Samsung is the first one to disclose the results of the innovation method. According to the Korean giant, they reduced the area by 14.8%, compared to the traditional method. Reduction in area results in the company having more room to add more "goodies" into a die, such as a transistor, leading to an overall increment in performance.

Image Credits: The Elec

Samsung also reported a wire length reduction of 9.2%, and while we won't get into the physics of it, to summarize, the length reduction results in a decreased resistance, allowing a larger current to flow through which leads to minimal power losses along with improved power delivery.

Samsung isn't the first company to disclose the "BSPDN" method, since back in June, Intel also held a briefing about the method, naming it "PowerVia". Team Blue announced plans to integrate the new method in its Intel 20A nodes, revealing a 90% chip utilization rate. The company stated that "PowerVia" will solve bottleneck issues within the interconnect seen in silicon architectures, by delivering power through the backside of a wafer, resulting in continuous transmission. Intel expected to use the new method for its upcoming Arrow Lake CPUs, expected to be launched by 2024.

Samsung hasn't revealed whether the new power delivery method will be integrated into future processes. However, based on the current disclosures by the company, we believe that next-gen processes could feature the technology slightly after Intel's implementation.

Written by Muhammad Zuhair

WccftechContinue reading/original-link]

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